Prototyping to Signoff for FOWLP, 2.5/3D IC and More

Xpedition IC Packaging VX.2.10 delivers capabilities targeted at the prototyping, planning, and design of next-generation 2.5/3D heterogeneous packages. Learn about all of the new features and enhancements of the VX.2.10 release.

Siemens' long-term partner Samsung Foundry has recognized its partnership and substantial contributions to the broader Samsung Foundry ecosystem over the past year with three Samsung SAFE Awards.

As next-generation HDAP designs become more common, PCB designers & engineers are looking to system-level co-design to tie multi-substrate visualization, planning, & optimization, into a complete multi-board design.

System Technology Co-Optimization (STCO) driven prototyping and planning delivers heterogeneous integration that meets PPA goals.

A complete solution for physical implementation of High Density Advanced Packages (HDAP), such as FOWLP, 2.5/3D, and SiP technologies.

Comprehensive PEX, EM modeling, SI/PI, and thermal/stress analysis.

The industry’s most trusted technology, Calibre, provides the foundation for a comprehensive package assembly level verification and signoff solution.

Graphical virtual prototyping & planning environment tuned for the exploration and integration of heterogeneous ASIC/chiplets and interposers using System Technology Co-Optimization (STCO) with predictive multi-physics analysis.

Complete physical design and verification solution. Supports heterogeneous integration using the latest silicon and wafer-based technologies such as RDL fan-out wafer
level packaging (FOWLP) and 2.5D/3DIC​.

Complete design verification and signoff of heterogeneous integrated assemblies using foundry/OSAT supplied assembly design kits (ADK) Direct integration with Xpedition Package Designer streamlines tapeout readiness.