ic packaging, an image of a chip in the center of a computer motherboard

Complete Solution for IC Package Design

IC Packaging Design & Verification

Monolithic scaling limitations are driving the growth of 2.5/3D multi-die heterogeneous and homogeneous integrated technologies allowing PPA targets to be met. Our integrated flow addresses the challenges of prototyping to Signoff for FOWLP, 2.5/3D IC, and other emerging technologies.

View Products

What’s New in Xpedition IC Packaging VX.2.10 Update 3

Xpedition IC Packaging VX.2.10 Update 3 delivers capabilities targeted at the prototyping, planning, and design of next-generation 2.5/3D heterogeneous packages. Discover the new features and enhancements of the VX.2.10 release.

What’s New in Xpedition IC Packaging VX.2.10 Update 1

Xpedition IC Packaging VX.2.10 Update 1 delivers capabilities targeted at the prototyping, planning, and design of next-generation 2.5/3D heterogeneous packages. Discover the new features and enhancements of the VX.2.10 release.

What’s New in Xpedition IC Packaging VX.2.10

Xpedition IC Packaging VX.2.10 delivers capabilities targeted at the prototyping, planning, and design of next-generation 2.5/3D heterogeneous packages. Learn about all of the new features and enhancements of the VX.2.10 release.

IC Packaging Solutions

Digital image of Multi-Substrate Integration

Heterogeneous Co-Optimization

2.5/3D Substrate Integration

System Technology Co-Optimization (STCO) driven prototyping and planning delivers heterogeneous integration that meets PPA goals.

Multi Substrate Implementation

Package Design

A complete solution for physical implementation of High Density Advanced Packages (HDAP), such as FOWLP, 2.5/3D, and SiP technologies.

Multi-physics Analysis

Package Simulation

Comprehensive PEX, EM modeling, SI/PI, and thermal/stress analysis.

Application software image for Comprehensive Verification

Physical Verification/Signoff

3D DRC/LVS Verification

The industry’s most trusted technology, Calibre, provides the foundation for a comprehensive package assembly level verification and signoff solution.

Featured Products

Xpedition Substrate Integrator

Graphical virtual prototyping & planning environment tuned for the exploration and integration of heterogeneous ASIC/chiplets and interposers using System Technology Co-Optimization (STCO) with predictive multi-physics analysis.

Xpedition Package Designer

Complete physical design and verification solution. Supports heterogeneous integration using the latest silicon and wafer-based technologies such as RDL fan-out wafer
level packaging (FOWLP) and 2.5D/3DIC.

Calibre 3DSTACK

Complete design verification and signoff of heterogeneous integrated assemblies using foundry/OSAT supplied assembly design kits (ADK) Direct integration with Xpedition Package Designer streamlines tapeout readiness.