{"showBreadcrumbs":true,"breadcrumbs":[{"title":"Siemens EDA Software","path":"/en-US/"},{"title":"IC Packaging","path":"/en-US/ic-packaging"},{"title":"IC Packaging Solutions","path":"/en-US/ic-packaging/software"},{"title":"Package Signoff","path":""}],"tagline":"Overview","title":"Package Signoff","description":"Design verification of multiple die and substrate assemblies by identifying geometries per layer per die placement in the assembly. DRC and LVS is performed on the interface geometries between die with support for dies from multiple processes.","pricingCurrency":"US$","image":{"url":"//images.ctfassets.net/17si5cpawjzf/3CpoXAKHFGU5HtK2JMZeg1/d9128d37be9c7ad15363f229ba67a4f0/calibre-3dstack-new-promo-640x480.jpg?w=640","alt":"calibre 3dstack new promo","linkData":"{\"name\":\"calibre-3dstack-new-promo-640x480\",\"id\":\"3CpoXAKHFGU5HtK2JMZeg1\",\"contentType\":\"image/jpeg\"}"},"secondaryButton":{"text":"Read White Paper","url":"https://resources.sw.siemens.com/en-US/white-paper-crossing-the-chasm-bringing-soc-and-package-verification-together-with","env":"master"}}