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{"heading":"Semiconductor Foundry Support","shareURL":"https://eda.sw.siemens.com/en-US/ic-packaging/semiconductor-foundry-support/","children":"<p>Foundry-specific process flows that are built, tested, and certified</p>"}

Semiconductor Foundry Support

<p>Foundry-specific process flows that are built, tested, and certified</p>
{"headingSize":"heading2","sectionHeading":"TSMC Certified Reference Flows","sectionDescription":"<p>Taiwan Semiconductor Manufacturing Company (TSMC®) is the world’s largest dedicated semiconductor foundry. TSMC offers multiple advanced IC packaging technologies for which the Siemens EDA IC packaging design solution has been certified. </p>","align":"text-left","parentCard":{"cardTitle":"TSMC certified reference flows","cardDescription":" Advanced IC packaging is critical to industries where high-performance is mandatory.","imgUrl":"https://images.sw.cdn.siemens.com/siemens-disw-assets/public/3ItNo9IBpL3sdxW9r8OEnj/en-US/TSMC-certified-reference-flows-640x480.jpg?w=640&q=60","imgAlt":"TSMC certified reference flows 3D logo","childCards":[{"cardTitle":"Integrated Fanout (InFO)","cardDescription":"Supports single, multi-die or package-on-package. Complete prototyping, design and verification certified."},{"cardTitle":"Chip on Wafer on Substrate (CoWoS) ","cardDescription":"Integrates logic and memory in 3D targeting, AI, HPC. Xpedition Substrate Integrator creates, optimizes & manages a 3D model."},{"cardTitle":"Wafer on Wafer (WoW) ","cardDescription":"Xpedition Substrate Integrator creates, optimizes, and manages a 3D model that drives design."},{"cardTitle":"System-on-Integrated Chips (SoIC)","cardDescription":"Xpedition Substrate Integrator optimizes and manages a 3D model that drives design then verification with Calibre 3DSTACK."}]},"childCards":[{"cardTitle":"Integrated Fanout (InFO)","cardDescription":"Supports single, multi-die or package-on-package. Complete prototyping, design and verification certified."},{"cardTitle":"Chip on Wafer on Substrate (CoWoS) ","cardDescription":"Integrates logic and memory in 3D targeting, AI, HPC. Xpedition Substrate Integrator creates, optimizes & manages a 3D model."},{"cardTitle":"Wafer on Wafer (WoW) ","cardDescription":"Xpedition Substrate Integrator creates, optimizes, and manages a 3D model that drives design."},{"cardTitle":"System-on-Integrated Chips (SoIC)","cardDescription":"Xpedition Substrate Integrator optimizes and manages a 3D model that drives design then verification with Calibre 3DSTACK."}]}

TSMC Certified Reference Flows

<p>Taiwan Semiconductor Manufacturing Company (TSMC®) is the world’s largest dedicated semiconductor foundry. TSMC offers multiple advanced IC packaging technologies for which the Siemens EDA IC packaging design solution has been certified. </p>
TSMC certified reference flows 3D logo

TSMC certified reference flows

Advanced IC packaging is critical to industries where high-performance is mandatory.

Integrated Fanout (InFO)

Supports single, multi-die or package-on-package. Complete prototyping, design and verification certified.

Chip on Wafer on Substrate (CoWoS)

Integrates logic and memory in 3D targeting, AI, HPC. Xpedition Substrate Integrator creates, optimizes & manages a 3D model.
TSMC certified reference flows 3D logo

TSMC certified reference flows

Advanced IC packaging is critical to industries where high-performance is mandatory.

Integrated Fanout (InFO)

Supports single, multi-die or package-on-package. Complete prototyping, design and verification certified.

Chip on Wafer on Substrate (CoWoS)

Integrates logic and memory in 3D targeting, AI, HPC. Xpedition Substrate Integrator creates, optimizes & manages a 3D model.
TSMC certified reference flows 3D logo

TSMC certified reference flows

Advanced IC packaging is critical to industries where high-performance is mandatory.

Integrated Fanout (InFO)

Supports single, multi-die or package-on-package. Complete prototyping, design and verification certified.

Chip on Wafer on Substrate (CoWoS)

Integrates logic and memory in 3D targeting, AI, HPC. Xpedition Substrate Integrator creates, optimizes & manages a 3D model.

Integrated Fanout (InFO)

Supports single, multi-die or package-on-package. Complete prototyping, design and verification certified.

Chip on Wafer on Substrate (CoWoS)

Integrates logic and memory in 3D targeting, AI, HPC. Xpedition Substrate Integrator creates, optimizes & manages a 3D model.

Wafer on Wafer (WoW)

Xpedition Substrate Integrator creates, optimizes, and manages a 3D model that drives design.

Integrated Fanout (InFO)

Supports single, multi-die or package-on-package. Complete prototyping, design and verification certified.

Chip on Wafer on Substrate (CoWoS)

Integrates logic and memory in 3D targeting, AI, HPC. Xpedition Substrate Integrator creates, optimizes & manages a 3D model.

Wafer on Wafer (WoW)

Xpedition Substrate Integrator creates, optimizes, and manages a 3D model that drives design.