Custom IC Verification

The world's fastest nanometer circuit verification platform for analog, RF, mixed-signal, and custom digital circuits.

Industry’s fastest mixed-signal simulation for complex IC designs

Comprehensive AI-powered design environment for nominal and variation-aware
verification of custom IC circuitry enabling full design coverage in orders-of-magnitude fewer simulations, with the accuracy of brute-force techniques.

Providing fast, accurate library characterization tools powered by machine learning.

Providing the industry's fastest, most comprehensive integrated IP validation solution, providing complete, seamless IP QA from design to tape-out, across all design views and IP revisions.

Industry standard SPICE simulation for HV, RF and safety critical designs

High-performance, high-throughput cell library characterizer for standard, multi-bit, and I/O cells.

Extends the Questa Verification platform to the mixed-signal world to create and verify complex analog and mixed-signal designs.

Learn how Allegro MicroSystems leveraged AI-powered Solido Design Environment and Analog FastSPICE to accelerate power management integrated circuit verification, resulting in an overall reduction in verification time.

Watch this session and learn how to leverage AWS cloud capacity for full cloud migration or peak demand expansion for custom integrated circuit verification workloads, and achieve faster time-to-market.

Learn how Microsoft leverages Solido IP Validation to address IP quality issues early in the design process, saving time and money on potential (ECOs), improving overall IP quality in production and integration flows.

Learn how SiTime leverages AFS, Symphony and Solido Design Environment to ensure seamless integration between the analog and digital components and accelerate verification of high precision MEMS based oscillators SoC.

Learn how NVIDIA leveraged Solido Additive Learning technology to speed up standard cell library verification with Solido Design Environment while maintaining accuracy on verifying a new process design kit (PDK) revision.

Learn how ST leverages Solido Crosscheck within its IP QA infrastructure to manage IP complexity, providing a comprehensive, proactive IP validation solution to improve the quality of silicon and accelerate SoC delivery.

Learn how ST leveraged Symphony and Visualizer to enhance verification throughput for SmartPower Technologies and analyze and debug the interface between analog and digital in an easier and faster way.

Learn how Solido Library Profiler and Generator enable users at Infineon to compare and profile .libs coming from different IP sources so optimal dataset can be chosen, leading to better PPA analysis and shorter design cycles.

Learn how ST uses Solido PVTMC Verifier to predict the dispersion of analog parameters over PVT, and Solido Additive Learning to re-use previous results, reducing the number of runs and accelerating the verification phase.

Learn how Silicon Creations harnesses Siemens SPICE technology to manage constant growth of design complexity. Highlighting latest performance gains that made 3nm designs possible including simulations results.

Learn how Siemens SPICE and mixed-signal simulation tools helped LG achieve significant performance and productivity improvements for phase-locked loop (PLL) intellectual property (IP) versus previous solutions.