With leading C++ and SystemC support, Catapult offers advanced HLS tools for FPGA, eFPGA, and ASIC. Catapult will accelerate your success with solutions for outstanding Quality of Results through physical awareness, low-power estimation-optimization, design checking, lint, formal, and code coverage.
Catapult High-Level Synthesis solutions deliver C++ and SystemC language support, FPGA and ASIC independence, ASIC power estimation and optimization plus the latest in Physically aware multi-VT area and performance optimization to elevate your designs.
Find out how the Catapult High-Level Synthesis and Verification platform enables you to do more, and do it better. Learn about AI/ML, Deep Learning, Computer Vision, Communications, Video, and more. Siemens' High-Level Synthesis and Verification (HLS & HLV) tools deliver the competitive edge you need.