The HyperLynx Hybrid solver decomposes a design into traces, planes & vias by creating a model for each section and then solving for overall behavior using a variety of different solver methods. It assumes the structure is planar (or in the case of cables, a cross-section) such that these analytical techniques are valid. Hybrid solvers are less compute and memory intensive than full-wave solving and can model larger structures as a result. Where the "cut and stitch" method is used to model signal paths with a full wave solver, a hybrid solver models the entire signal path and performs the decomposition in the solver.

The HyperLynx Hybrid solver is ideally suited for performing power-aware analysis of entire DDR interfaces, where capturing the effects of return path current sharing and Simultaneous Switching Noise (SSN) are important. It is also ideally suited for full-board AC power integrity, modeling decoupling capacitors and power delivery to IC pins. The Hybrid solver is especially well suited to power integrity because it models partial power planes and associated fringing effects.