Tessent Platform helps IC design teams achieve manufacturing test quality goals faster and with fewer resources compared to traditional DFT methods. This production-proven automation enables a simple, consolidated hand-off between teams, resulting in a sustainable and predictable flow.
Define intent with specification-based IP insertion, a single, unified database, and Tessent Core Description based data transfer. DFT IP and Signals are automatically configured for all test modes.
By leveraging IEEE 1687 (IJTAG) infrastructure, insertion, ICL extraction and PDL retargeting is supported for Tessent as well as third-party IP. Multiple chip-level interfaces are supported for manufacturing and in-system test.
With integrated introspection and design editing customizations across the flow, the flow can be customized in a sustainable way. Custom DRCs, user-defined commands and custom pre- or post-insertion scripts can be utilized.