Tessent MemoryBIST, an industry-leading memory built-in self-test, includes a uniquely comprehensive automation flow that provides design rule checking, test planning, integration, and verification all at the RTL or gate level.
The advanced BAP provides a configurable interface to optimize in-system testing. It also supports a low-latency protocol to configure the memory BIST controller, execute Go/NoGo tests, and monitor the pass/fail status.
Memory test algorithms can be hardcoded into the Tessent MemoryBIST controller, then applied to each memory through run-time control. This lets you select shorter test algorithms as the manufacturing process matures.
The Tessent MemoryBIST repair option eliminates the complexities and costs associated with external repair flows. It tests and permanently repairs all defective memories in a chip using virtually no external resources.