Tessent LogicBIST efficiently integrates with Tessent MissionMode and Tessent TestKompress to create a complete in-system and manufacturing test solution for safety-critical devices.
Engineered for hybrid TK/LBIST applications, the Tessent VersaPoint test point technology improves ATPG pattern count and logic BIST testability at the same time, improving LBIST coverage by 2%-4%.
By observing circuit data at each shift cycle, not only in capture, the Observation Scan Technology (OST) significantly reduces pattern count needed to reach target logic BIST test coverage.
Tessent Hybrid TK/LBIST efficiently combines the logic architecture of Tessent TestKompress and LogicBIST to improve test quality while avoiding any area penalty, reaping the benefits of both ATPG compression and logic BIST.
In this presentation, Daniel Tille of Infineon shows the use of LogicBIST with Observation Scan Technology, which is proven to drastically reduce logic built-in self-test (LBIST) test time for Infineon Automotive microcontrollers (MCUs).