Tessent Advanced DFT
Tessent AnalogTest
Tessent AnalogTest reduces analog test pattern development and verification from engineering months to engineering hours. As the only commercial solution currently available, it is the most effective way to maximize defect coverage while reducing test cost.
Why Tessent AnalogTest?
Testing analog circuits has traditionally been a tedious, manual process. Tessent AnalogTest enables 10x-100x reduction in silicon analog test time compared to traditional specification tests.
Reduce test cost
Analog testing requires lengthy test times on expensive mixed-signal testers. Tessent AnalogTest generates minimal-impact DFT circuitry and digital test patterns to test analog circuit block in <1 ms on digital-only testers.
Increase engineering efficiency
Tessent AnalogTest transforms analog DFT and test development into a quick, automated process. Structural and specification tests are verified in simulation before being run on ATE or in-system, reducing debug time.
Maximize analog test coverage
Specification testing of analog circuits can have lower test coverage to minimize yield loss. Digital scan-based DFT and ATPG can provide simulated test patterns that achieve higher defect coverage without increasing yield loss.
Reduce time-to-market with Tessent AnalogTest coverage
Find out how to minimize manufacturing test escapes for analog and mixed-signal circuits and improve a product's time-to-market with Tessent AnalogTest.