Tessent Embedded Analytics
System debug
Accelerate debug, validation and optimization of complex multi-core Systems on Chip (SoCs) by leveraging embedded non-intrusive instrumentation. You can then observe what’s happening in the design when software runs on the system.
Accelerate debug, validation and optimization
Accelerate the debugging, validation and optimization of complex multicore SoCs. Debug and software engineers can leverage embedded non-intrusive instrumentation such as bus monitors, network on chip (NoC) monitors and CPU debug modules. This allows them to observe the design when operational software runs on the system. The instruments enable complete transaction-level traffic visibility on buses with a wide range of measurements, analytics and statistics gathering. These tools are all highly configurable and include “logic analyzer” style controls and dependencies, local buffering and cross-triggering. The instrumentation is accessed through standard interfaces such as JTAG, USB2 or USB3.
SoC debug: The need for visibility
Software provides much of the functionality of a broad spectrum of devices and systems. Software quality – and how the software interacts with the hardware it runs – is paramount.
Tessent SystemInsight for SoC debug
Leverage our complete Eclipse-based integrated development environment (IDE) that extends the features of a traditional debugger (run control, trace). Get support for heterogeneous designs and full system visibility, which is enabled by the Tessent Embedded Analytics integrated into the system-on-chip (SoC).
Optimizing SoC performance with Embedded Analytics
Get updated on the major trends affecting the technology industries. You will learn how Tessent Embedded Analytics can help optimize SoC performance, turning complexity into a competitive advantage.
Embedded SDK - a little bit of genius
Learn how Embedded Analytics helps to raise the quality of SoC's and assists with getting you to market faster.
Learn more
Demonstration platform overview
Get an overview of the SoC design, and familiarize yourself with the system environment used in the demo videos on this page.
Detection of unexpected bus transactions
View this demonstration of detecting transactions that occur within a specified memory range.
Bus monitor trace transaction example
Learn how a bus monitor is used to determine the average time of a bus transaction to trigger a capture of bus trace.
Cross triggering demonstration
See how a bus monitor is configured to trigger other Tessent Embedded Analytics modules in the event of a timeout.
Metric generation example
See how two Bus Monitors are used to count the total number of transactions written to a destination.
