Integrated Fanout (InFO)
Supports single, multi-die, or package-on-package. Complete prototyping, design and verification certified.
Chip on Wafer on Substrate (CoWoS)
Integrates logic and memory in 3D targeting, AI, and HPC. Xpedition Substrate Integrator creates, optimizes & manages a 3D model.
Wafer on Wafer (WoW)
Xpedition Substrate Integrator creates, optimizes, and manages a 3D model that drives design.
System-on-Integrated-Chips (SoIC)
Xpedition Substrate Integrator optimizes and manages a 3D model that drives design and then verification with Calibre 3DSTACK.