PCB Stackup Design


High-Speed PCB Stackup Design

Z-planner Enterprise is a stackup planning tool that includes a PCB stackup calculator focused on electrical impedance and signal integrity that helps you manage and optimize your PCB stackup design. It’s library of PCB laminate material reduces material costs without sacrificing performance.

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z-planner enterprise PCB stackup design calculator for optimizing electrical impedance and signal integrity. PCB laminate material
Z-planner Enterprise

Signal integrity through design (7:20)

Join Z-planner founder Bill Hargin as he explores PCB trends that are leading to new PCB design methodology focused on using PCB stackup planning software. This video explores how Z-planner Enterprise is used to manage electrical integrity and impedance, providing a complete PCB stackup solution.

PCB stackup calculator

Z-planner Enterprise contains a stackup calculator which ensures signal integrity across a
PCB for various controlled impedance models to quickly simulate electrical performance based on the current stack up configuration.

Making use of Siemen’s Hyperlynx Field Solver, users are able to target specific differential impedances to determine specific circuit values based off of the copper trace specs and the calculated signal frequency characteristics.

Insertion loss

Stackup planning requires more than just calculating controlled impedance. Z-planner Enterprise allows detailed insertion loss calculation within a stackup across any range of frequencies. Calculate your total insertion loss and determine specific sources for this loss including:

  • dielectric loss

  • copper roughness

  • skin effect

  • glass weave skew

  • conductor loss

Dielectric dissipation factors

By altering trace length, dielectric dissipation factors and copper material attributes, Z-planner Enterprise provides you with a valuable insight into the electrical integrity of your PCB stackup design.

z-solver PCB stackup calculator image

For Correct-by-Design Stackups

Z-planner Enterprise: High-speed Stackup Design

Z-planner Enterprise optimizes the process of defining stackup requirements and documenting those requirements early in the design process, ensuring that pre-layout signal-integrity simulations are based on the most accurate laminate data available using a consistent stackup design methodology.

"Z-planner software reduces the time it takes us to specify and validate fabricator stackups. We can evaluate three different stackups in an hour, rather than a day, and it significantly reduces the amount of back-and-forth communication required with our fabricators and NPI team."

Dr. Jayaprakash Balachandran, Senior Technical Leader, Signal Integrity Engineering