HyperLynx Design Rule Check

Manual design reviews are inefficient at best - we send designs out for review by people who are simultaneously working on a number of other projects, schedule a date for a meeting, and hope people show up with useful feedback after having done a careful review. But truthfully - how often does that really happen? Reviewing layouts visually is boring and error prone, and life is full of more immediate pressures. HyperLynx DRC replaces these manual processes with fast, thorough automated electrical rule checks that run in real time, so you don't have to wait days or weeks for feedback. It checks designs accurately and quantitatively, providing precise feedback of what the design requirement was, where the layout is in violation and by how much. DRC produces a detailed list of potential design issues, each of which can be selected to zoom the layout view to the spot in question and highlight the problem.

DRC comes with over 90 domain-based, parameterizable rules that check for potential analog, EMI, packaging layout, power integrity, signal integrity and compliance-based electrical safety issues. Many of the rules are multi-function, so that an even greater collection of design issues that can be identified. Setting up analysis for a particular design simply involves identifying the signals or areas to be checked, along with what rules to apply.

Once a potential issue has been identified, reviewed and found to require a change to layout, that change needs to be communicated to others quickly and concisely. HyperLynx DRC creates ShareLists that automatically drive PCB tools to display the areas in question by panning and zooming the display. This allows issues to be communicated clearly and accelerates the process of changing the layout to resolve a list of issues.

In addition to DRC's built-in rules library, users can develop their own custom checking rules in Python, taking advantage of a built-in set of design objects and automation functions. DRC's fast, comprehensive 3D structural analysis engine lets you create rules to check for complex, proprietary design requirements and report violations using the same analysis flow, reporting and cross-probing mechanisms as the rules supplied with DRC. DRC is also externally automatable, so once you have the rules and parameters you want to use, you can drive DRC to perform batch checking of designs, further reducing design review time and improving efficiency.

Post-layout verification is a race against time - the minute a layout is "complete", there's pressure to release the design for prototype fabrication, even before post-layout design verification is complete. Traditional, comprehensive post-layout modeling and simulation is time and expertise intensive - and expensive.

HyperLynx DRC is the first stage of Siemens' unique "progressive verification" methodology that allows designers to find as many potential problems with a design as quickly as possible, with as little time and effort as possible. DRC can find issues in minutes that might take days to find with simulation, if they are found at all. There's no point in investing time, effort and money running complex simulations when simple problems exist with the design that can be found quickly. Running a design review with DRC first allows users to find and resolve those issues before they move onto more complex verification processes.