Meet the growing need for more complex designs in smaller form factors. Efficiently interconnect array packages with high numbers of I/Os.
Many I/Os in a small area makes it nearly impossible to route to the inner balls with normal PCB fabrication technology. What is required for these connections are layers of High-Density Interconnect (HDI) with microvias. This technology merges IC fabrication with PCB.
Define the microvia structure and associated constraints
Specific values for via capacitance and delay are important for constraint adherence (e.g. delay formulas) and simulation accuracy.
Localized rules under components to facilitate escape paths
When doing the fanout, localized rules (trace widths/clearances, via sizes) can be defined to achieve the densities necessary to route away from the high-density pins. Using larger rules everywhere else will result in higher yield.
45° routing for BGA fanout
Routing with true 45-degree angles creates escape paths out of high-density pad regions.
Vias inside SMD land pads
Vias inside pads help facilitate tighter densities.
Via fanout routing schemes
Unique via fanout routing schemes (define what depth to stagger to; router will create appropriate stagger pattern)