We offer a complete development flow for 5G SoCs, from RTL simulations to HW emulation. Users can start their interoperability and conformance tests immediately when the first lines of RTL and software become available. The development phases are followed by the Veloce X-STEP family of test systems that bring those pre-silicon test cases into life in post-silicon SoC bring-up and verification.
With Veloce X-STEP, the same O-RAN Fronthaul specifications from virtual environments can be re-used in the 5G SoC bring-up phase in a lab. This ensures a smooth bring-up of the SoCs and paves the road for full system integration and interoperability.
As the latest addition to the Veloce X-STEP product family, X-STEP EVA introduces
the 50G line rate as the first O-RAN Fronthaul test system on the market. 10G
and 25G as the most widely used O-RAN Fronthaul line rates today are also
supported.
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