Veloce HW-Assisted Verification System

The Veloce hardware-assisted verification system is the first complete, integrated offering that combines best-in-class virtual platform, hardware emulation, and FPGA prototyping technologies and paves the way to leverage the latest powerful hardware-assisted verification methodologies.

Veloce Hardware-assisted Verification System

The Veloce Hardware-assisted verification system is made up of four key components: The Veloce Strato hardware and software platform, Veloce Apps, Veloce Protocol Solutions, and the Veloce FPGA prototyping hardware and software platform.

Verification of SoC designs

Veloce Hardware Platform

The Veloce Strato Platform is engineered to scale to support 15 BG designs, capable of verifying the largest chips ever designed while helping to meet your performance and power requirements.

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Emulator Offload/SW Validation

Veloce FPGA Prototyping Platforms

Veloce Primo (enterprise) and Veloce proFPGA (desktop) represent the industry’s most powerful and versatile approach to FPGA prototyping.

A computer processor on a motherboard, with a graphic overlay of binary code.

Apps for specific challenges

Veloce Apps

Veloce Apps run on the Veloce operating system to leverage the proven, robust capabilities of the Veloce emulator to solve specific verification and validation challenges.

Protocol solutions for SoC

Veloce Protocol Solutions

Veloce Protocol Solutions use protocol-specific hardware and virtual devices and standards-based, high-speed transactors to exercise all peripherals in a design.

For the main Veloce page to link to Veloce X-STEP content

Development and Validation

Veloce X-STEP for 5G

For full system integration and interoperability, Veloce X-STEP, uses the very same O-RAN Fronthaul executable specifications from virtual environments in the 5G SoC bring-up phase in a lab.