Tessent SiliconInsight provides an automated interactive environment for test bring-up, debug, and silicon characterization of devices containing Tessent ATPG, EDT, BIST, and/or IJTAG test structures.
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Tessent SiliconInsight greatly increases productivity for chip designers and test engineers during silicon validation and debug, speeding time-to-market. The solution works in a bench-top environment and connects to any debug, performance, or bring-up board, accessing up to 120 device pins.
<p>Validate test patterns before first silicon using the design in a standard simulator, inject faults, characterize potential failure scenarios without silicon.</p>
<p>Desktop debug environment for ATPG, MBIST, LBIST, and IJTAG through access to up to 120 device pins using 3rd party USB adaptors. Shmoo capability of power and clock through GPIB.</p>
<p>The ATE-Connect technology creates an industry-standard interface to eliminate communication barriers between proprietary, tester-specific software and design-for-test (DFT) platforms.</p>
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