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Solido Simulation Suite resources

Solido Simulation Suite is an integrated suite of AI-accelerated SPICE, Fast SPICE and mixed-signal simulators designed to help customers dramatically accelerate critical design and verification tasks for their next-generation analog, mixed-signal and custom IC designs.

White papers

On-demand webinars

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SiTime verification acceleration with AFS

Learn how SiTime leverages AFS, Symphony and Solido Design Environment to ensure seamless integration between the analog and digital components and accelerate verification of high precision MEMS based oscillators SoC.

PowerPoint slide that states User2User, Accelerating PMIC Verification Using AI-powered Solido Design Environment and Analog FastSPICE. Rajiv Damodaran Prabha, Ravi Shankar Gaddam, Meghana Gulien Raghuram. Allegro Microsystems.
User2User NA 2024 SESSION
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Allegro AI accelerated PMIC verification

Learn how Allegro MicroSystems leveraged AI-powered Solido Design Environment and Analog FastSPICE to accelerate PMIC verification, resulting in an overall 5X reduction in verification time.

PowerPoint slide that states User2User, How AWS cloud compute helps scale custome IC verification workloads, Azim Siddiqu, Senior Solutions Architect, AWS, Wei Lii Tan, Director of Product Management, Siemens EDA.
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Scale custom IC verification workloads with AWS

Watch this session and learn how to leverage AWS cloud capacity for full cloud migration or peak demand expansion for custom IC verification workloads, and achieve faster time-to-market.

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Address post-layout simulation bottleneck with AFS XT

In this session, we provide an in-depth introduction to Analog FastSPICE eXTreme – the latest AFS innovation, designed to remove the post-layout simulation bottleneck.

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OMI aging analysis for long term reliability validation

In this webinar, we provide an in-depth introduction to aging analysis using the CMC industry standard Open Model Interface (OMI) with Fraunhofer Institute for Integrated Circuits, Division Engineering Adaptive Systems EAS.

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Increase analog IP verification throughput with AFS

In this session, we provide an in-depth feel of IC development challenges and how a comprehensive verification solution through our Analog FastSPICE Platform caters to Samsung Foundry’s advanced technology nodes.

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Addressing RF Verification Challenges with AFS HB

Attend this session and learn how recent innovations to the AFS Harmonic Balance (HB) engine are used in conjunction with AFS eXTreme.

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U2U 22: AMS verification methodology for MIPI PHYs

User2User: This session highlights how Mixel achieved first-pass silicon success of high-speed low power MIPI PHYs with a robust verification methodology using Analog FastSPICE (AFS-XT) and Symphony. 

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U2U 22: Silicon-Accurate Design & Verification with AFS

User2User: In this session, Analog Bits describes how they use AFS to address the challenges associated with achieving silicon-accurate design and verification on a wide portfolio of PLL's and sensors in advanced processes.

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When it’s Do or Die – Choose Debug!

Attend and learn how the Symphony Mixed-Signal platform can help you cut down your debug cycles and improve productivity.

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Digital-centric methodologies for AMS verification

Attend this session and learn how digital-centric mixed-signal verification methodologies, including real number modeling, UVM-AMS and UPF-MS, can be used to improve SoC verification throughput and improve time-to-market.

Online events

Executive videos