Siemens’ flagship FPGA synthesis solution offering advanced optimizations, debug & validation technologies, and tight integration with the Siemens FPGA flow. It provides several unique features that enable every designer to reach design closure faster with a user-friendly validation environment.
Successful FPGA design requires an integrated flow from design creation in C++/SystemC/HDL, design synthesis, design verification & validation to PCB design. The result is an optimal FPGA implementation that meets all the design requirements and enables designers to meet standards such as DO-254.
<p>Precision RTL Plus offers multiple features for safety-critical designs in the military-aerospace domain requiring DO-254 certification. These include guaranteed repeatability of synthesis results, synthesis for design assurance, and DO-254 certification enabled by tight integration with Siemens FPGA design flow.</br></br></br></p>
<p>Siemens EDA has the only complete FPGA design flow in the industry with Precision RTL Plus in the center. It has tight integration with the following flows:</p><ul><li><p>High-level Synthesis with <a href=/en-US/ic/catapult-high-level-synthesis/hls>Catapult</a> </br></p></li><li><p>Design reuse with HDL Designer</br></p></li><li><p>Equivalence checking with <a href=/en-US/ic/formalpro-equivalence-checking>FormalPro</a></br></p></li><li><p>Requirements tracking with <a href=/en-US/ic/questa/simulation/reqtracer>ReqTracer</a></br></p></li><li><p><a href=/en-US/pcb/xpedition-enterprise/multi-discipline/fpga-pcb-codesign/>FPGA-PCB co-design</a> with I/O Optimizer</br></p></li></ul><p></p>
<p>Today’s FPGAs have an abundance of specialized resources such as DSPs & RAMs. However, optimal utilization of these resources is a challenge. Precision RTL Plus provides a unique solution with an FPGA Resource Manager - a graphical tool to manage embedded resources and do what-if analysis to achieve the best performance and area.</p><p></p>
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