With a broad range of analysis capabilities, PowerPro helps you and your RTL designers visualize the power profile of IPs/blocks. This will allow you to take corrective action early in the RTL design process.
PowerPro RTL Power Estimation
PowerPro RTL Power Estimation utilizes fast, physical engine under-the-hood combined with power-aware simulation to deliver highly accurate power estimates in the shortest turnaround time.
KEY FEATURES
RTL Power Estimation
- Cycle-accurate peak power at multiple resolutions with coarse-grained and fine-grained visualization
- Power/energy reports by clock domain, voltage domain and power domain
- Reports in text, HTML, CSV and JSON formats
- Full access and visibility with GUI to visualize, cross-probe and root-cause power
You can perform average and time-based power analysis for both RTL and gate-level designs using PowerPro. Time-based analysis is performed on a cycle-by-cycle basis with the ability to perform a moving average function on the peak power plot, if desired. The time-to-power for time-based power analysis at the finest resolution (cycle-accurate) is comparable to that of averaged analysis.
PowerPro supports a variety of switching activity formats including SAIF, QWAVE, FSDB, Virtual FSDB and direct streaming from Veloce emulation. You can report power in different configurations including power summary, hierarchical power, instance-wise power, power by clock domain, voltage domain and power domain. Power reports can be dumped in a variety of formats like text, html, csv and JSON.
PowerPro on-demand training
Learn how to use PowerPro for power analysis/estimation at both RTL and gate-level and how to optimize power during RTL development for the lowest possible design power.
PowerPro support
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