Calibre xACT 3D

In the world of electrical engineering, a field solver is electromagnetic simulation software for accurately predicting and analyzing the behavior of electric fields and electromagnetic waves on an integrated circuit. Rather than relying on simplified models or theoretical calculations, a field solver uses advanced numerical methods to simulate 3D interactions between electric charges, currents, and materials.

xACTView helps visualize the Calibre xACT 3D design in 3D format

Parasitic extraction is the process of computing the capacitance, resistance, and inductance of metal interconnect wires in a semiconductor device. These parasitic effects arise due to the non-ideal behavior of wires, transistors, and other components, and can significantly impact the performance and reliability of a chip.

Some electromagnetic (EM) solvers work well with chip design to have a more accurate parasitic extraction. The EM solver integrates with a layout vs schematic (LVS) tool, so that the device parameters are calculated by LVS, and the parasitics are measured with a field solver.

As integrated circuits (ICs) become more complex, designers face increasing challenges in ensuring accurate and reliable operation. One critical aspect of this is parasitic extraction, the process of determining the effects of physical structures such as wires, transistors, and capacitors on circuit performance. Without accurate parasitic extraction, designers risk poor performance, increased power consumption, and even catastrophic failure. By accounting for parasitic effects during the design process, engineers can optimize circuit performance and minimize the risk of costly errors. Parasitic extraction is an essential tool in modern IC design, enabling engineers to create chips that operate efficiently and reliably in a wide range of applications.

Some of the commonly extracted parasitic elements include resistors (R), inductors (L), and capacitors (C). These elements arise from the inherent properties of the materials used in building electronic devices and circuits.

Capacitance can cause unwanted coupling between different parts of the circuit and reduce high-frequency performance. Inductance can cause signal delay and reduce high-frequency performance, while resistance can lead to power losses, voltage drops, and thermal problems. These effects can reduce power efficiency, crosstalk, and signal-to-noise ratio, and lead to malfunctions, which could negatively impact chip performance.

Parasitic capacitance refers to the capacitance that unintentionally exists between two conductors. This capacitance is a function of proximity of the conductors, their surface area, and the dielectric constant between them. The impact of parasitic capacitance can be significant, leading to distortion in electronic signals and slowing down the performance of circuits. Because it is often difficult to eliminate this capacitance entirely, engineers must find ways to mitigate its effects through careful design and layout considerations.

Parasitic resistance occurs when there is unwanted resistance present in the circuit due to the connections, components, or layout of the circuit. Parasitic resistance depends on the type of metal, and the width and thickness of the metal interconnect.

Inductance is a fundamental property of an electrical circuit, and it is the measure of an object's ability to generate an electromotive force (EMF) in response to a change in the electrical current flowing through it. The physical unit for measuring inductance is the henry. Essentially, inductance describes how much a circuit opposes changes in the electrical current flowing through it. The more inductance a circuit has, the more it will resist.

“Calibre xL” Calibre xL Extraction | Siemens Software calculates parasitic inductance, and is integrated with Calibre xACT, Calibre xACT 3D and Calibre xRC to provide a unified RLC netlist.

Full wave analysis is an approach to solving the complete set of Maxwells equations without any simplifying assumptions. The fields described by these equations are typically time-variant and frequency-dependent, making them a challenge to accurately analyze. Full wave solvers are typically used for structures such as antennas and transmission lines operating at a high frequency.

No, Calibre xACT 3D is not a full wave solver. It is a capacitance field solver. Unlike a full wave solver which has very low capacity, Calibre xACT 3D can be run on a full chip. It is integrated with Calibre xL to provide inductance, and Calibre xACT to provide resistance. It is typically used to calculate parasitics for an analog, RF, or digital integrated circuit.

Yes, you can run Calibre xACT 3D on a full chip. One example is for a 12nm memory with 513,000 nets, Calibre xACT 3D in RCC mode took 2.1 hours to run on 16 CPUs.

To run Calibre xACT 3D, you need a Calibre xACT 3D license, the design schematic and layout, and a Calibre xRC or Calibre xACT rule deck downloaded from the foundry web site.

Yes, Calibre xACT 3D is integrated into Virtuoso. Starting the run uses Calibre Interactive GUI, and debugging the parasitics is done with Calibre RVE, which allows parasitics to be highlighted on the layout. The parasitic output is in Calibre view format, which is a graphical extracted view.

Yes, Calibre xACT 3D has many reduction algorithms built in, including frequency-based reduction, threshold-based reduction, via reduction, and metal fill reduction.