Veloce Strato CS is based on the purpose-built CrystalX accelerator chip delivering innovation to the emulation platform offering the fastest design iterations in the market, combined with usage flexibility, deterministic compile, and blade-level capacity up to 40+ Billion gates.
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Today’s IC designs are large and complex, routinely overpassing 10’s of billion gates combined with complex software workloads. The Veloce Strato CS scalable architecture supports the largest possible capacity requirements, scaling from 40 million gates configurations to 40+ billion gates.
Veloce Strato CS is continuing the capacity leadership in delivering systems to emulate today’s largest chips. Veloce Strato CS is based on highly scalable and interconnectable blades delivering capacity scaling from 40 Million Gates to 40+ Billion Gates. The modular architecture and multi-user capability enables flexibility for sharing the system for different size designs and teams worldwide 24x7.
Veloce Strato CS executes workloads and tests up to 5X faster compared to the previous generation Veloce emulation platform. The CrystalX Chip, Veloce Hardware and Software architecture is devised for the highest emulation performance. Veloce co-model channel architecture has been enhanced to boost the bandwidth requirement with increase in emulation speed and size of design.
Veloce Strato CS drops seamlessly into modern enterprise datacenters due to its blade architecture. It complies with modern data center requirements, hot-aisle/cold-aisle layout, air cooling (no water needed) rack footprint, standard cabling for power/networking and best power/gate efficiency.
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