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Avery Verification IP

Avery Verification IP for USB

Accelerated confidence in simulation-based verification of RTL designs with USB interfaces: UCM2, USB3.1, USB3.2, USB-C, Other USB-C Protocols

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Assorted USB cable connectors.

Why Avery Verification IP for USB?

Get a comprehensive VIP solution portfolio for USB SS+ 4.x, 3.x and 2.0 used by SoC and IP designers to ensure comprehensive SoC-level verification and protocol and timing compliance. Avery VIP for USB implements a complete set of models, protocol checkers and compliance testsuites in 100% native SystemVerilog and UVM.

Deliverables

  • Combo USB 4.0 including complete PCIe and DP tunneling
  • Combo USB SS+ 3.x/2.0/OTG/Power Delivery host, device, and hub BFMs
  • Compliance test suites
  • User guide

Our USB host, device and hub models support a comprehensive USB protocol checklist and assertions and functional and performance coverage monitors for commands, transfer lengths and throughput. USB transaction classes include random constraint for automatic TP sequence generators including bulk, isochronous, interrupt, bulk stream and control transfer types. Other features of Avery Verification IP for USB include:

  • Automatic frame scheduling and bus interval and service interval support including ITP generation
  • Program host and device model timing parameters and response behaviors such as link commands and jitter/SSC
  • Fine-grained control over LTSSM transition sequences and Link layer controls
  • Inject errors at all layers through callbacks
  • Control device operations state transitions including suspend/resume and full power management support (U0-U3) including automatic and software directed entry/exit and PowerOn and Inband reset
  • Compliance testsuite supports hub and device verification including protocol, link, and phy layer testing including power management
  • Comprehensive USB protocol checklist and assertions track compliance coverage and isolate DUT bugs faster
  • End2end Scoreboard
  • Multi-level protocol trackers (USB transaction, LTSSM, symbol) protocol analyzer tracker for effective debug

Protocol Family 

Standard Organization 

Sub Protocol 

Models 

USB4/3 

USB-IF 

USB 4.0 

USB-IF 

USB4 Logical CTS 1.1 

USB-IF 

USB4 Protocol CTS 1.1 

USB-IF 

USB 3.2 CTS 

xHCI 

USB-IF 

xHCI 1.2 

PD 

USB-IF 

PD V3.0 R2.0 

USB-IF 

PD V3.0 V1p14 r2 

UAS/BOT 

USB-IF 

UAS 1.0 

USB-IF 

UASP CTS 0.9 

USB-IF 

BOT 1.0 

T10 

SBC4r12 

T10 

SPC5r12 

T10 

SAT3r04 

T10 

SAM6r02 

USB2 

USB-IF 

USB 2.0 

USB-IF 

ULPI 1.2 

USB-IF 

UTMI+ 1.0 

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Verification Academy

Verification Academy provides the skills necessary to mature an organization's functional verification process capabilities, providing a methodological bridge between high-level value propositions and the low-level details.

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Verification Horizons blog

Insight and updates on concepts, values, standards, methodologies, and examples to assist with the understanding of what advanced functional verification technologies can do and how to most effectively apply them.

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Verification Horizons

The Verification Horizons publication provides concepts, values, methodologies and examples to assist with the understanding of what advanced functional verification technologies can do and how to most effectively apply them.

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