Accelerated confidence in simulation-based verification of RTL designs with Universal Chiplet Interconnect Express (UCIe) interfaces
Support standalone UCIe die to die adapter and LogPHY verification along with integrated PCIe and CXL VIP to run over the UCIe stack. Verify UCIe-based IP and SoC/SiP products that use UCIe as the I/O interconnect for data-intensive applications in 2.5D IC and 3DIC applications.
Deliverables
Avery Verification IP for UCIe includes:
Protocol Family | Standard Organization | Sub Protocol | Models |
|---|---|---|---|
UCIe | Universal Chiplet Interconnect Express (UCIe) | UCIe 1.0 |
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