Assorted Silicon wafer dies in a geometric pattern.

Avery Verification IP

Accelerated Confidence:
Improve quality and reduce schedule risk with a broad portfolio of reusable protocol and methodology components that support a wide range of industry-standard interfaces.

Why Avery Verification IP?

Eliminate time spent developing and maintaining custom bus functional models (BFMs) or verification components. Avery Verification IP (VIP) enables System and System-on-Chip (SoC) teams to achieve dramatic verification productivity improvements.

60+

standard protocols

5+

industry exclusive VIPs

20+

compliance test suites

Explore Avery VIP products

Discover the range of Avery VIP products below, including high-performance compute, memory models and protocols, and SoC protocols.

High-performance compute

Avery Verification IP memory models & protocols

SoC protocols

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Verification Academy

Verification Academy provides the skills necessary to mature an organization's functional verification process capabilities, providing a methodological bridge between high-level value propositions and the low-level details.

Verification Horizons blog

Insight and updates on concepts, values, standards, methodologies, and examples to assist with the understanding of what advanced functional verification technologies can do and how to most effectively apply them.

Verification Horizons

The Verification Horizons publication provides concepts, values, methodologies and examples to assist with the understanding of what advanced functional verification technologies can do and how to most effectively apply them.