Overview
Questa Power-Aware simulator
The Questa Power-Aware simulator enables design teams to verify the active power management planned for implementation, but starting much earlier in the design process. Static checks during UPF compilation locate architectural issues, while dynamic checks during simulation find behavioral issues.
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Questa Power-Aware simulator
Effects of active power management on the design’s structure and behavior are reflected in the waveform, schematic, and power state/transition views. The Questa Power-Aware simulator automatically detects power management errors in both the architecture and behavior of the power management system.
Dynamic and static checking
Automatically detects power management errors in both the architecture and the behavior of the power management system. Static checks during compilation of the UPF identify architectural issues, while dynamic checks during simulation identify behavioral issues.
Integration with verification
Power states and transitions are recorded in the Unified Coverage DataBase (UCDB) for integration with verification planning and management. This data enables incorporation of power-aware simulation goals into the verification plan so they can be tracked for coverage closure.
Ease of use
Three views (waveform, schematic, and power state/transition) enable designers to find and resolve issues in the power management system quickly and efficiently.
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Verification Horizons blog
Insight and updates on concepts, values, standards, methodologies, and examples to assist with the understanding of what advanced functional verification technologies can do and how to most effectively apply them.
Verification Horizons
The Verification Horizons publication provides concepts, values, methodologies and examples to assist with the understanding of what advanced functional verification technologies can do and how to most effectively apply them.