Join Siemens EDA for an engineering update on the methodologies, technologies, and solutions for the ASIC, FPGA, and systems verification challenges unique to today’s aerospace and defense industry. Design and verification engineers and managers serving the aerospace and defense industry won’t want to miss this deep dive into the future of digital verification.
The Questa Advanced Simulator achieves industry-leading performance and capacity through very aggressive, global compile and simulation optimization algorithms for SystemVerilog and VHDL.
Using its advanced algorithms, the Questa Advanced Simulator can help you improve SystemVerilog and mixed VHDL/SystemVerilog RTL simulation performance by up to 10X.
The Questa Advanced simulator supports all design languages and constructs, and either automatically or manually partitions the design to run in parallel while maintaining a single database for debug and coverage.
The Questa Advanced Simulator supports the most comprehensive solutions for testbench automation in the industry, enabling automatic creation of complex, input-stimuli using SystemVerilog or SystemC Verification (SCV) library constructs, and combining these forms of stimulus generation with functional coverage to identify the functionality exercised by the automatically-generated stimulus.
Verification Academy provides the skills necessary to mature an organization's functional verification process capabilities, providing a methodological bridge between high-level value propositions and the low-level details.
Insight and updates on concepts, values, standards, methodologies, and examples to assist with the understanding of what advanced functional verification technologies can do and how to most effectively apply them.
The Verification Horizons publication provides concepts, values, methodologies and examples to assist with the understanding of what advanced functional verification technologies can do and how to most effectively apply them.
Learn how to use ModelSim/Questa GUI and command line to verify and debug HDL designs in interactive mode or build batch mode scripts for fast simulations.