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Assuring IC integrity

OneSpin formal verification solutions

OneSpin formal verification solutions address today's critical IC integrity issues. These solutions enable design teams to tackle the toughest next-generation verification challenges and create SoCs that are functionally correct, safe, secure, and trusted.

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Wilson Research 2022 Functional Verification Study

The findings from this study provide invaluable insight into the state of today’s IC/ASIC and FPGA markets.

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OneSpin Formal Verification

Unique technology

OneSpin targeted solutions verify that IP and ICs operate as intended even under adverse conditions caused by hardware faults or malicious attacks in the field. Design teams can achieve predictable and complete coverage with unbounded proofs for even the toughest problems.

FPGA equivalence checking
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Questa Equivalent FPGA

Questa Equivalent FPGA ensures advanced optimizations needed to meet aggressive power, performance & area goals do not change design functionality, ensuring errors aren’t introduced during synthesis or place & route

Assuring completeness
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Questa Gap Free

Questa Gap Free verifies assertions are sufficient to cover a design, ensuring no unverified RTL functionality. This automatically detects spec. omissions & errors, holes in the verification plan and unverified RTL functions.

High-level verification
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Questa HL-SystemC

High-level synthesis is becoming popular, particularly for data-driven designs (automotive, AI, machine learning & 5G). This solution provides exhaustive & automated verification for companies using C++/SystemC.

DVT OneSpin FMEDA - original scale
Safety Verification
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FMEDA - safety analysis

OneSpin Functional safety analysis is designed to meet the requirements of ISO26262, IEC61508, DO-254 & other standards. FMEDA automates failure mode, effects, & diagnostic analysis flows that requires minimal fault simulation

DVT Verify Trust - original scale
Detecting adversary attacks
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Questa Verify Trust

The Questa Verify Trust solution automates detection of hardware Trojans and vulnerabilities by leveraging unique under-the-hood technology uncovering security-relevant hardware weaknesses and vulnerabilities in complex IPs & SoCs

DVT Questa Processor - original scale
Ensure IP core implementation
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Questa Processor

Processor Verification addresses the needs of core providers & integrators, with quick and exhaustive verification of implementation and proof of compliance to instruction set architecture (ISA) with no hardware vulnerabilities.

White Papers

Featured OneSpin Resources

White Paper

360 EC-FPGA retargeting flow

The 360 EC-FPGA retargeting solution allows for system designs residing on obsolete field programmable gate arrays (FPGAs) to be retargeted onto newer technology, extending the life of these designs while also taking advantage of the latest safety, security, and power saving features newer FPGAs provide.

The flow includes two implementation steps. 1) The transformation from the original obsolete input netlist to a netlist targeting the same device technology 2) The actual retargeting step, yielding a final netlist targeting an up-to-date device family In addition, 360 EC-FPGA is used to verify functional correctness of the implementation steps.

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Verification Academy

Verification Academy provides the skills necessary to mature an organization's functional verification process capabilities, providing a methodological bridge between high-level value propositions and the low-level details.

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Verification Horizons blog

Insight and updates on concepts, values, standards, methodologies, and examples to assist with the understanding of what advanced functional verification technologies can do and how to most effectively apply them.

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Verification Horizons

The Verification Horizons publication provides concepts, values, methodologies and examples to assist with the understanding of what advanced functional verification technologies can do and how to most effectively apply them.

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