Questa X-Check

Overview

Questa X-Check

An undefined signal at a critical control junction in a design, or a register unexpectedly loaded with garbage, can quickly cascade into a perplexing, show-stopping bug. Unfortunately, the handling ‘X’ level signals differ in logic synthesis and simulation.


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updated 4.22.21
Key Features

The Solution: Questa Automated X-State Verification

The automated Questa X-Check app is designed to automatically employ formal analysis to exhaustively identify ‘X’ propagation issues in your design. Specifically, taking your RTL and a spec of your initialization sequence as input Questa X-Check begins.

X-State Verification

Rapidly Identify Chip-Killing X-State Issues

An undefined signal at a critical control junction in a design, or a register unexpectedly loaded with garbage, can quickly cascade into a perplexing, show-stopping bug. Unfortunately, the handling ‘X’ level signals differ in logic synthesis and simulation. In the former case, ‘X’ is treated as a “don’t care”; the latter ‘X’ is treated as an “unknown”.

image displaying corrupted registers | Questa X-Check can rapidly identify chip-killing X-state issues

Questa Formal Verification Resources

More resources available at the Verification Academy.

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Verification Academy provides the skills necessary to mature an organization's functional verification process capabilities, providing a methodological bridge between high-level value propositions and the low-level details.

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Insight and updates on concepts, values, standards, methodologies, and examples to assist with the understanding of what advanced functional verification technologies can do and how to most effectively apply them.

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The Verification Horizons publication provides concepts, values, methodologies and examples to assist with the understanding of what advanced functional verification technologies can do and how to most effectively apply them.