1. Home
  2. Siemens EDA Software
  3. IC Tool Portfolio
  4. Advanced Verification
  5. Questa Formal Verification
  6. Questa SLEC
Overview

Questa SLEC

Using the “specification” RTL and the “implementation” RTL as input, the Questa SLEC formal app automatically compares the two code blocks using an exhaustive formal analysis. No knowledge of formal or property specification languages is required.

Get in touch with our sales team 1-800-547-3000

image dvt-formal-verification flow diagram - updated 4.22.21
Key Features

Questa Sequential Logic Equivalence Check (SLEC)

Today's designs rely on complex industry standard interfaces that must be verified to ensure IP interoperability and system behavior. Whether a given interface is used without modification, or customized to help differentiate the end-product, integrating even mature IP can produce unexpected issues.

Automated, exhaustive SLEC

When an Exhaustive Comparison Is Essential

The Questa “SLEC” app uses formal analysis to exhaustively compare the “Specification” and “Implementation” RTL, identifying any differences in the output behavior of the two for all input, and all time. No knowledge of formal or property specification languages is required.

image dvt-formal-verification schematic
Live & On-Demand

Featured Formal Verification Webinars

Verifying changes to RTL and testbench code prior to releasing to the rest of your team is the best way to avoid committing bugs that cause massive, team-wide disruptions. This webinar takes you through example tool flows that, when used within a Continuous Integration (CI) system, can avoid or even eliminate those bugs and disruptions.
ON-DEMAND WEBINAR
all

Practical Flows for Continuous Integration

In this webinar we’ll teach you how to use a collection of tools – both formal and simulation – as part of a comprehensive approach to verifying RTL and testbench changes before
releasing them to your team.

In this webinar, we will show how with a little design knowledge and forethought on your part, you can leverage these two principals to cut down your formal analysis to a matter of minutes vs. hours.
FORMAL 101
all

Data Independence and Non-Determinism Made Easy

ON-DEMAND WEBINAR

In this webinar, we will show how with a little design knowledge and forethought on your part, you can leverage these two principals (DI and ND) to cut down your formal analysis to a matter of minutes vs. hours.

In this webinar, we will show you how to use IEEE standard property checking code (SVA) and off-the-shelf formal tools to quickly and exhaustively verify data transport through the DUT matches the specification.
FORMAL 101
all

Scoreboarding and Data Integrity Verification Made Easy

ON-DEMAND WEBINAR

In this webinar, we will show you how to use IEEE standard property checking code (SVA) and off-the-shelf formal tools to quickly and exhaustively verify data transport through the DUT matches the specification.

In this webinar we will show you how to write optimal constraints for formal analysis; and how to deliberately under- and over-constrain the analysis to learn more about the effectiveness of the constraints.
FORMAL 101
all

Setting Up & Optimizing Constraints

ON-DEMAND WEBINAR

In this webinar we will show you how to write optimal constraints for formal analysis; and how to deliberately under- and over-constrain the analysis to learn more about the effectiveness of the constraints.

Formal verification algorithms can struggle to read-in and analyze DUTs with very large state spaces. Specifically, circuit elements like counters and memories can introduce a lot of state bits and sequential state depth that can bring a formal analysis to a grinding halt. The solution is to “abstract away” such parts of the DUT by either swapping in simplified models of these elements, or by safely removing them completely (electronically, without touching your golden RTL source code).
FORMAL 101
all

Basic Abstraction Techniques

ON-DEMAND WEBINAR

In this webinar you will learn the types of DUT constructs that commonly cause formal analysis trouble, and how to apply time-tested techniques to safely abstract them away so that formal verification can rapidly reach closure.

FORMAL TRENDS & TECHNOLOGIES

Questa Formal Verification Resources

Ready to talk to someone today?

We're standing by to answer your questions.

Email us

Get in touch with our sales team 1-800-547-3000 or 1-503-685-8000

Consulting Services Icon

Verification Academy

Verification Academy provides the skills necessary to mature an organization's functional verification process capabilities, providing a methodological bridge between high-level value propositions and the low-level details.

View Resources

Verification Horizons Blog

Insight and updates on concepts, values, standards, methodologies, and examples to assist with the understanding of what advanced functional verification technologies can do and how to most effectively apply them.

View Blog

Verification Horizons Issue

The Verification Horizons publication provides concepts, values, methodologies and examples to assist with the understanding of what advanced functional verification technologies can do and how to most effectively apply them.

View the Latest Issue