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Overview

Questa SLEC

Using the “specification” RTL and the “implementation” RTL as input, the Questa SLEC formal app automatically compares the two code blocks using an exhaustive formal analysis. No knowledge of formal or property specification languages is required.

Get in touch with our sales team 1-800-547-3000

image dvt-formal-verification flow diagram - updated 4.22.21
Live & On-Demand

Featured Formal Verification Webinars

In this webinar, we will show how with a little design knowledge and forethought on your part, you can leverage these two principals to cut down your formal analysis to a matter of minutes vs. hours.
LIVE WEBINAR
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Data Independence and Non-Determinism Made Easy

In this webinar, we will show how with a little design knowledge and forethought on your part, you can leverage these two principals to cut down your formal analysis to a matter of minutes vs. hours.

In this webinar, we will show you how to use IEEE standard property checking code (SVA) and off-the-shelf formal tools to quickly and exhaustively verify data transport through the DUT matches the specification.
ON-DEMAND WEBINAR
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Scoreboarding and Data Integrity Verification Made Easy

In this webinar, we will show you how to use IEEE standard property checking code (SVA) and off-the-shelf formal tools to quickly and exhaustively verify data transport through the DUT matches the specification.

In this webinar we will show you how to write optimal constraints for formal analysis; and how to deliberately under- and over-constrain the analysis to learn more about the effectiveness of the constraints.
ON-DEMAND WEBINAR
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Setting Up & Optimizing Constraints

In this webinar we will show you how to write optimal constraints for formal analysis; and how to deliberately under- and over-constrain the analysis to learn more about the effectiveness of the constraints.

Key Features

Questa Sequential Logic Equivalence Check (SLEC)

Today's designs rely on complex industry standard interfaces that must be verified to ensure IP interoperability and system behavior. Whether a given interface is used without modification, or customized to help differentiate the end-product, integrating even mature IP can produce unexpected issues.

Automated, exhaustive SLEC

When an Exhaustive Comparison Is Essential

The Questa “SLEC” app uses formal analysis to exhaustively compare the “Specification” and “Implementation” RTL, identifying any differences in the output behavior of the two for all input, and all time. No knowledge of formal or property specification languages is required.

image dvt-formal-verification schematic
FORMAL TRENDS & TECHNOLOGIES

Questa Formal Verification Resources

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Get in touch with our sales team 1-800-547-3000 or 1-503-685-8000


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Verification Academy

Verification Academy provides the skills necessary to mature an organization's functional verification process capabilities, providing a methodological bridge between high-level value propositions and the low-level details.

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Verification Horizons Blog

Insight and updates on concepts, values, standards, methodologies, and examples to assist with the understanding of what advanced functional verification technologies can do and how to most effectively apply them.

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Verification Horizons Issue

The Verification Horizons publication provides concepts, values, methodologies and examples to assist with the understanding of what advanced functional verification technologies can do and how to most effectively apply them.

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