Under the hood, PropCheck’s world-class, high capacity, high throughput engines effectively build on their respective strengths by cooperating with each other in real time; thus completing verification faster.
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Questa PropCheck is the perfect tool to accelerate bug detection, error correction and coverage closure. It easily verifies designs with assertions; analyzing design behavior vs. the desired behavior described by the assertions identifying all design states that are reachable from the initial state.
Define the Intended Behavior
Even the most well written constrained-random testbenches cannot traverse every part of a design’s state space. The truth is that simulation-based verification is fundamentally incomplete for even small DUTs. It can take many weeks before a simulation testbench is created, providing a window of opportunity for complex bugs to be written into the IP.
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