Using a cleartext, human and machine readable spreadsheet and RTL as input, the Questa Connectivity Check app automates formal technology to exhaustively verify all types of static and dynamic connections.
Ease of use
Automatically derives all the required assertions from your CSV or XML connectivity specifications, and displays them in an easy-to-understand tabular format.
Verifies on-chip bus, inter-block, control signal, clock and reset connections at the sub-system or SoC level. Exhaustively checks all modes of operation.
Completes exhaustive verification of all static and dynamic connections within a matter of hours. "Black boxes" interior areas of the IPs in your RTL to keep focus on the connectivity alone.
Verification Academy provides the skills necessary to mature an organization's functional verification process capabilities, providing a methodological bridge between high-level value propositions and the low-level details.
Insight and updates on concepts, values, standards, methodologies, and examples to assist with the understanding of what advanced functional verification technologies can do and how to most effectively apply them.
The Verification Horizons publication provides concepts, values, methodologies and examples to assist with the understanding of what advanced functional verification technologies can do and how to most effectively apply them.