Questa Connectivity Check

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Overview

Questa Connectivity Check

Exhaustive verification of all static and dynamic connections is completed by the formal engines within a matter of hours vs. the weeks required with test bench simulation-based approaches.


Get in touch with our sales team 1-800-547-3000

Questa Connectivity Check provides exhaustive verification of all static and dynamic connections, completed by the formal engines within a matter of hours.

Updated 4.22.21
Key Features

The Idyllic Past vs. Modern Reality

Previously, a meticulous release engineer could manually inspect the DUT schematic, RTL code, and device specs for any connectivity discrepancies. Today, with modern “correct by construction” code generation tools and linting, the verification of connectivity between IPs in a SoC is a trivial task.

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Ease of Use

Automatically Captures Connectivity Specifications

<p>Automatically derives all the required assertions from your CSV or XML connectivity specifications, and displays them in an easy-to-understand tabular format.</p>

Questa Connectivity Check automatically derives all the required assertions from your CSV or XML connectivity specifications, and displays them in an easy-to-understand tabular format.

Thorough Coverage

Exhaustive Connection Verification

<p>Verifies on-chip bus, inter-block, control signal, clock and reset connections at the sub-system or SoC level. Exhaustively checks all modes of operation.</p>

Questa Connectivity Check verifies on-chip bus, inter-block, control signal, clock and reset connections at the sub-system  or SoC level. Exhaustively checks all modes of operation.

Speed

Fast Connectivity Verification

<p>Completes exhaustive verification of all static and dynamic connections within a matter of hours. "Black boxes" interior areas of the IPs in your RTL to keep focus on the connectivity alone.</p>

Questa Connectivity Check completes exhaustive verification of all static and dynamic connections within a matter of hours. "Black boxes" interior areas of the IPs in your RTL to keep focus on the connectivity alone.
FORMAL TRENDS & TECHNOLOGIES

Questa Formal Verification Resources

More resources available at the Verification Academy.

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