Questa One
Low power
A comprehensive solution for power intent verification and early power estimation. The Questa One low power solution, with UPF 4.0 support, spans the entire design flow, from architectural choices and high-level verification to RTL development, emulation and implementation of ASIC and FPGA designs.
Questa One low power signoff verification
Questa One Power Aware offers a comprehensive verification platform with advanced power analysis features for complex system on chip designs and supports unified power format (UPF) 4.0. It integrates dynamic Power Aware simulation, clock domain crossing (CDC), dynamic voltage and frequency scaling checks, test plan authoring, advanced coverage analysis and a unified debug environment with coverage metrics.
Advanced low power verification with UPF 4.0
Discover how the latest advances in UPF 4.0 can be used for defining complex power intent in today’s SOC’s. This paper describes the new syntax that is available to designers in UPF 4.0 and how Questa One Power Aware can be used to verify the intent that is defined in the UPF.
Discover related technologies
Discover underlying Questa One and Siemens technologies that deliver a comprehensive low power solution and explore how they can help you address complex power analysis challenges.
Verification Academy: dive deep into low power
Learn about low power CDC methodology by discussing the low power CDC challenges, describing the UPF-related power logic structures relevant to CDC analysis and explaining a low power CDC verification methodology.
Low power solution areas
Learn more about Questa One and broader Siemens Power Aware technologies to accelerate the journey to low power signoff.
Questa One Sim Xact streamlines GLS bring-up with innovative formal analysis and flow automation, leading to more complete signoff verification.
Big data is transforming and enabling industries to innovate their products more rapidly and improve many aspects of our lives. Questa One VIQ transforms the verification process using analytics, collaboration and traceability.
Coverage Analyzer accelerates coverage closure by applying analytics to the closure problem and providing team-based collaborative closure, improving the understanding of the coverage model with insightful visualizations.
Extending the Questa verification platform to include verification of circuits that contain analog intellectual property (IP), the Questa ADMS tool combines several high-performance simulation engines in one efficient tool and supports every major hardware description language and exchange standard.
Deepen your knowledge of Questa One low power
Support Center
Siemens EDA offers comprehensive customer support for Questa One low power solutions.
Verification Academy
Verification Academy provides the skills necessary to mature an organization's low power process capabilities, providing a methodological bridge between high-level value propositions and the low-level details.
Verification Horizons blog
Gain insight and updates on concepts, values, standards, methodologies and examples that assist with the understanding of advanced low power workflows and solutions and how to most effectively apply them with our blog.