CPU server acceleration
Innexis Architecture Native Acceleration
Innexis Architecture Native Acceleration (ANA) software is a cloud-based, high-speed, virtual platform. By running natively on Arm-based servers, the software workloads run at much higher speeds than on typical instruction-set, simulation-based, virtual platforms.
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Why Innexis ANA?
Software is becoming more critical and a significant differentiator in innovative products. More complex software workloads running on increasingly complex hardware designs are leading the way in many markets. Innexis ANA delivers:
- Application programming interface (API) compatibility across all modeled peripherals
- Execution speeds faster than instruction set simulation (ISS)
- Cloud integration that scales across large, dispersed development teams
CPU range
Model a broad range of CPU cores with ease.
Software before silicon
Develop applications and operating system (OS) software long before silicon availability.
Native execution speeds
Execute operating systems and application software at native speed of approximately 2 to 4 Gigahertz
Key features
Virtual SoC models
Users can create virtual system on a chip (SoC) models that run natively on high-performance Arm Central Processing Units (CPUs) and graphics processing units (GPUs) through a simple web user interface. The ANA modeling layer allows for configuring cores, memory, networking, storage, accelerators and other devices. Once the models are created, users can start/stop the models.
Simple web user interface
A simple web user interface allows the user to:
- Edit the virtual SoC model configuration
- Start/stop the virtual SoC model
- Load software to the virtual SoC model
- Serial console for user interaction with the Virtual SoC Model and Software
- Manage different virtual SoC models
- Debug applications
- Profile and analyze software execution
Heterogeneous cores
It has become common for new SoC designs to have multiple compute clusters within the SoC. The ANA modeling layer allows for the creation of models using heterogeneous cores that will be used in the final SoC design, such as Arm Cortex-A cores for application processing, Arm Cortex-R cores for safety, Arm Cortex-M cores for system control and a GPU for computing.
