Faster Power Profiles
Veloce Powerstream App
Veloce PowerStream App generates power data for the full SoC at hundreds of kHz across the entire duration of software workloads. This enables early power analysis using real workloads, facilitating impactful decision-making
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Why the Veloce Powerstream App?
Veloce Powerstream enables early power analysis at the RTL level at 100s of kHzs with detailed key power metrics for the entire duration of real workloads. In addition, it enables detecting key areas for further detail power estimation and producing stimulus for sign-off power tools. It allows design teams to learn how each individual RTL block will behave in the full SoC context during real workload operations. This information can direct both RTL designers and software engineers to areas of interest in their designs and take actions to improve power efficiency. But as the design proceeds, attention shifts to more accurate power numbers for accurate power envelopes, thermal analysis, and packaging. Veloce Powerstream identifies the challenging areas for peak power and possible di/dt and generates stimulus for power-tools for further analysis.
- Generating power trend and power metrics for full SoC at 100s of KHZ
- With modular replay and the PowerStream App, early power analysis for the full SoC is achievable
- VDA and KPI will enable tracking across multi generations of the design and multiple design revisions
- Veloce’s 100% visibility allows stimulus generation for power tools without any capacity impact
- Direct integration with Power Tools
Lifetime project trends
Enable trend analysis for key SoC power metrics across a project lifecycle
Key Metrics
Storing and managing key power metrics in a centralized project database
Entire project knowledge
Power data is gathered for both the top-level design and any desired IPs
Key attributes
Comprehensive trend analysis
The project manager can use the top-level view and compare peak power or average power per weekly RTL revisions. The IP designer may look at the key statistics such Clock Gating Efficiency (CGE) or Flip Flop Efficiency (FFE) at the block level over multiple weeks or over various tests and perform optimizations that yield overall higher power/energy efficiency in the IP
Power visualization
The power metric dashboard enables you to view the overall progress in terms of power. Behavior of an IP over two separate tests like Manhattan or Aztec can be compared and power data for the tests can be viewed in much more detail. This is made possible by Veloce platform scalability handling large designs and fast power data extraction at cycle accuracy for entire software workloads over millions of cycles
Power KPIs covered
Discussing with different power teams, we have covered a list of important power KPIs in this tracking system. Some of the key statistics are Peak Power, Average Power, Total Energy, Clock Gating Efficiency (CGE), Flip Flop Efficiency (FFE), Structural attributes (flop count, latch count, memory information, clock gating ratio), power trend for various instances, and power domain information
