Faster Power Profiles
Veloce Powerstream App
Veloce PowerStream App generates power data for the full SoC at hundreds of kHz across the entire duration of software workloads. This enables early power analysis using real workloads, facilitating impactful decision-making
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Why the Veloce Powerstream App?
Veloce Powerstream enables early power analysis at the RTL level at 100s of kHzs with detailed key power metrics for the entire duration of real workloads. In addition, it enables detecting key areas for further detail power estimation and producing stimulus for sign-off power tools. It allows design teams to learn how each individual RTL block will behave in the full SoC context during real workload operations. This information can direct both RTL designers and software engineers to areas of interest in their designs and take actions to improve power efficiency. But as the design proceeds, attention shifts to more accurate power numbers for accurate power envelopes, thermal analysis, and packaging. Veloce Powerstream identifies the challenging areas for peak power and possible di/dt and generates stimulus for power-tools for further analysis.
- Generating power trend and power metrics for full SoC at 100s of KHZ
- With modular replay and the PowerStream App, early power analysis for the full SoC is achievable
- VDA and KPI will enable tracking across multi generations of the design and multiple design revisions
- Veloce’s 100% visibility allows stimulus generation for power tools without any capacity impact
- Direct integration with Power Tools
Lifetime project trends
Enable trend analysis for key SoC power metrics across a project lifecycle
Key Metrics
Storing and managing key power metrics in a centralized project database
Entire project knowledge
Power data is gathered for both the top-level design and any desired IPs
Key attributes
Data generation for power tools
Veloce Power App provides file-based outputs for cycle-accurate power analysis using Fast-Signal Database (FSDB) / and for average power using Switching Activity Interchange Format (SAIF). Streaming APIs also reduce disk usage and processing time by providing only essential data to downstream power tools.
Power-aware verification with UPF
Full SoC emulation with Unified Power Format (UPF) finds power-related issues typically missed in simulation, especially under long tests and realistic workloads. Veloce Power App instruments power-aware logic automatically and supports both on-chip and off-chip power management controllers.
Coverage for power-aware verification
Like functional verification, power-aware verification relies on comprehensive coverage. Veloce Power App automatically extracts state and state transition coverage metrics, helping users identify gaps and develop additional scenarios to close them.
