Hardware/Software co-verification
Veloce Codelink App
A software debug solution that is part of Siemens Veloce hardware assisted verification ecosystem, it helps efficient hardware/software co-verification by enabling software teams to debug embedded software in conjunction with hardware running in an emulator or enterprise prototyping environment.
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Why the Veloce Codelink App?
Veloce Codelink bridges the gap between software and hardware through its integration with Visualizer. This environment allows a unified debug experience allowing teams to trace software execution, set breakpoints, and analyze the interaction between software and hardware components all while freeing up valuable hardware-assisted verification resources and improving design and verification teams’ efficiency. Veloce Codelink is a must-have for addressing those hardware-software integration issues that are often challenging to identify root causes. Veloce Codelink includes a number of customer features such as:
- Software correlation to power profiles, performance and hardware waveforms
- Offline, deterministic and non-intrusive, replay-based software debug
- If there is a processor in the design, Veloce Codelink can support it
- Homogeneous and heterogeneous central processing unit (CPU) architecture support
- Works with simulation, emulation and enterprise prototyping
Correlate hardware and software
Software correlation to power profiles, performance metrics and hardware waveforms, enabling in-depth system analysis.
Processor and architecture neutral
With today’s multi-die chiplets, and complex system-on-chip (SoC), teams need software-based solutions that are vendor agnostic. Veloce Codelink’s is CPU vendor-neutral, accommodating any processor in the design
Execution platform independence
Compatible with simulation, emulation and enterprise prototypes, Veloce Codelink is a versatile and valuable solution for comprehensive system debug and integration.
Key attributes
Hardware/Software co-verification and debug
Today’s verification teams require debug frameworks that allow them to debug complex interactions quickly and easily. Veloce Codelink enables just this. Targeted at those in the verification team who work at the hardware/software boundary, Veloce Codelink and the Veloce Ecosystem provide software visibility and correlation to hardware events such as power profiles, performance metrics and hardware waveforms
Codelink monitoring
Veloce Codelink allows software validation and integration teams to debug their long running realistic workloads, no matter what architecture or processor is in the design. With support for leading architectures like Arm, RISC-V, and support for custom processors, Veloce Codelink is the software debug application of choice for both heterogeneous and homogenous designs
3rd party debugger support
Restricted by the availability and access to emulation or prototyping resources? Veloce Codelink, and its offline debug capabilities, address this challenge and offer full hardware/software verification capabilities while freeing up valuable verification resources. The ability to share these resources across team members further helps ensure your verification and validation timelines are satisfied
