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Overview

Aprisa digital implementation solution

Designing at advanced process nodes requires a new place-and-route paradigm to manage the increasing complexity. Aprisa is a detail-route-centric physical design platform for the modern SoC.


Get in touch with our technical team1-800-547-3000

Key features

Place-and-route technology for complex SoC designs

Aprisa offers complete functionality for top-level hierarchical design and block-level implementation for complex digital IC designs. The detail-route-centric architecture and hierarchical database enable fast design closure and optimal quality of results at a competitive runtime.

FEWER ITERATIONS

Detail-route-centric architecture

Enables efficient communication between placement optimization, CTS optimization, and detail routing for improved quality-of-results, fewer iterations and 2x faster design convergence.

HIGHEST QUALITY OF RESULTS

Leading foundry certified for advanced nodes

Aprisa is certified at the most advanced nodes for the main leading foundries. Its out-of-the-box reference flows make it easy to adopt for even the most complex designs.

LOW POWER

PowerFirst place-and-route

Aprisa can focus on low power as a primary design target for power sensitive designs, without sacrificing performance. Allowing designers to confidently choose the tradeoffs that meet their optimal PPA.

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Training and support

Access detailed user application notes, training resources and more.

EDA consulting

Helping you achieve maximum business impact by addressing complex technology and enterprise challenges with a unique blend of development and design experience and methodology expertise.

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Get in touch with our sales team 1-800-547-3000