Introducing Calibre DesignEnhancer
Automated DRC-clean layout optimization for the challenges of EM/IR
Join us at the Design Automation Conference 2023 at the Moscone Center West.
Tuesday July 11th at noon
Regardless of your next node, pressure to achieve expanded functionality within shorter time to market constraints is a reality. Siemens EDA introduces the Calibre DesignEnhancer tool with innovative technology that provides automated DFM optimizations during design implementation stages. Design teams can now quickly implement Calibre-clean DFM modifications that prepare designs for physical verification while reducing IR drop and EM issues. Get all the details and hear customers discuss the improvement they achieved in production designs using the Calibre DesignEnhancer tool.
Balancing time to market requirements against quality of results is a challenge at any node. The Calibre DesignEnhancer tool provides innovative technology that enables P&R and full-custom IC design teams to automatically implement Calibre-clean design for manufacturing (DFM) layout modifications during design implementation.
This lunchtime DAC session includes the following:
- Introduction to the Calibre DesignEnhancer tool use models and how they can benefit your design flow productivity while improving design quality
- Three use models currently available
- Push button automation minimizes training and setup
- Automated back-annotation to design database
- Proven in production flows
- Presentation by Juniper Networks sharing their results of running the Calibre DesignEnhancer tool on multiple designs, including runtimes and insertion rate, as well as external EMIR analysis that demonstrates the reduction achieved in IR drop.
Presenters
Jeff Wilson
Jeff Wilson is a product management director in the Siemens Calibre Design Solutions organization. He is responsible for the development of products that address the challenges of DFM and increasing the robustness of designs.
Jeff Wilson
Jeff Wilson is a product management director in the Siemens Calibre Design Solutions organization. He is responsible for the development of products that address the challenges of DFM and increasing the robustness of designs.
Jeff Wilson
Jeff Wilson is a product management director in the Siemens Calibre Design Solutions organization. He is responsible for the development of products that address the challenges of DFM and increasing the robustness of designs.
Ajay Bhandari
Ajay Bhandari, ASIC Sr. Manager at Juniper Networks. His current focus area of work is in developing physical design methodologies and execution flows for implementing large complex semiconductor ASICs in advance technology nodes.
Ajay Bhandari
Ajay Bhandari, ASIC Sr. Manager at Juniper Networks. His current focus area of work is in developing physical design methodologies and execution flows for implementing large complex semiconductor ASICs in advance technology nodes.
Ajay Bhandari
Ajay Bhandari, ASIC Sr. Manager at Juniper Networks. His current focus area of work is in developing physical design methodologies and execution flows for implementing large complex semiconductor ASICs in advance technology nodes.
Lalit Gajare
Lalit Gajare is Director of Ecosystem Promotion with Intel Foundry Services (IFS), at Intel. He is an EDA industry veteran with broad expertise in Physical Verification, Parasitic Extraction and Sign-Off.
Lalit Gajare
Lalit Gajare is Director of Ecosystem Promotion with Intel Foundry Services (IFS), at Intel. He is an EDA industry veteran with broad expertise in Physical Verification, Parasitic Extraction and Sign-Off.
Lalit Gajare
Lalit Gajare is Director of Ecosystem Promotion with Intel Foundry Services (IFS), at Intel. He is an EDA industry veteran with broad expertise in Physical Verification, Parasitic Extraction and Sign-Off.
Ready to learn more about Calibre?
We're standing by to answer your questions! Get in touch with our team today:
Call: 1-800-547-3000